mirror of
https://github.com/opelly27/rusty_brot.git
synced 2026-05-20 13:27:40 +00:00
opelly27
81 lines
3.8 KiB
LLVM
81 lines
3.8 KiB
LLVM
; ModuleID = 'probe4.b24db3a5-cgu.0'
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source_filename = "probe4.b24db3a5-cgu.0"
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "arm64-apple-macosx11.0.0"
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%"core::panic::location::Location" = type { { [0 x i8]*, i64 }, i32, i32 }
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@alloc5 = private unnamed_addr constant <{ [77 x i8] }> <{ [77 x i8] c"/rustc/4b91a6ea7258a947e59c6522cd5898e7c0a6a88f/library/core/src/ops/arith.rs" }>, align 1
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@alloc6 = private unnamed_addr constant <{ i8*, [16 x i8] }> <{ i8* getelementptr inbounds (<{ [77 x i8] }>, <{ [77 x i8] }>* @alloc5, i32 0, i32 0, i32 0), [16 x i8] c"M\00\00\00\00\00\00\00\12\03\00\00\01\00\00\00" }>, align 8
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@str.0 = internal constant [28 x i8] c"attempt to add with overflow"
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@alloc3 = private unnamed_addr constant <{ [4 x i8] }> <{ [4 x i8] c"\02\00\00\00" }>, align 4
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; <i32 as core::ops::arith::AddAssign>::add_assign
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; Function Attrs: inlinehint uwtable
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define internal void @"_ZN51_$LT$i32$u20$as$u20$core..ops..arith..AddAssign$GT$10add_assign17he5cd2e744e064107E"(i32* align 4 %self, i32 %other) unnamed_addr #0 {
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start:
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%0 = load i32, i32* %self, align 4
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%1 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %0, i32 %other)
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%_4.0 = extractvalue { i32, i1 } %1, 0
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%_4.1 = extractvalue { i32, i1 } %1, 1
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%2 = call i1 @llvm.expect.i1(i1 %_4.1, i1 false)
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br i1 %2, label %panic, label %bb1
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bb1: ; preds = %start
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store i32 %_4.0, i32* %self, align 4
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ret void
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panic: ; preds = %start
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; call core::panicking::panic
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call void @_ZN4core9panicking5panic17h02e9fc642940f2ecE([0 x i8]* align 1 bitcast ([28 x i8]* @str.0 to [0 x i8]*), i64 28, %"core::panic::location::Location"* align 8 bitcast (<{ i8*, [16 x i8] }>* @alloc6 to %"core::panic::location::Location"*)) #5
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unreachable
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}
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; <i32 as core::ops::arith::AddAssign<&i32>>::add_assign
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; Function Attrs: inlinehint uwtable
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define internal void @"_ZN66_$LT$i32$u20$as$u20$core..ops..arith..AddAssign$LT$$RF$i32$GT$$GT$10add_assign17haaf4dc4b2bf8999aE"(i32* align 4 %self, i32* align 4 %other) unnamed_addr #0 {
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start:
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%_5 = load i32, i32* %other, align 4
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; call <i32 as core::ops::arith::AddAssign>::add_assign
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call void @"_ZN51_$LT$i32$u20$as$u20$core..ops..arith..AddAssign$GT$10add_assign17he5cd2e744e064107E"(i32* align 4 %self, i32 %_5)
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br label %bb1
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bb1: ; preds = %start
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ret void
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}
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; probe4::probe
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; Function Attrs: uwtable
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define void @_ZN6probe45probe17h17555576140a3688E() unnamed_addr #1 {
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start:
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%x = alloca i32, align 4
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store i32 1, i32* %x, align 4
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; call <i32 as core::ops::arith::AddAssign<&i32>>::add_assign
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call void @"_ZN66_$LT$i32$u20$as$u20$core..ops..arith..AddAssign$LT$$RF$i32$GT$$GT$10add_assign17haaf4dc4b2bf8999aE"(i32* align 4 %x, i32* align 4 bitcast (<{ [4 x i8] }>* @alloc3 to i32*))
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br label %bb1
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bb1: ; preds = %start
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ret void
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}
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; Function Attrs: nofree nosync nounwind readnone speculatable willreturn
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declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) #2
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; Function Attrs: nofree nosync nounwind readnone willreturn
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declare i1 @llvm.expect.i1(i1, i1) #3
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; core::panicking::panic
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; Function Attrs: cold noinline noreturn uwtable
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declare void @_ZN4core9panicking5panic17h02e9fc642940f2ecE([0 x i8]* align 1, i64, %"core::panic::location::Location"* align 8) unnamed_addr #4
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attributes #0 = { inlinehint uwtable "frame-pointer"="non-leaf" "target-cpu"="apple-a14" }
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attributes #1 = { uwtable "frame-pointer"="non-leaf" "target-cpu"="apple-a14" }
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attributes #2 = { nofree nosync nounwind readnone speculatable willreturn }
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attributes #3 = { nofree nosync nounwind readnone willreturn }
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attributes #4 = { cold noinline noreturn uwtable "frame-pointer"="non-leaf" "target-cpu"="apple-a14" }
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attributes #5 = { noreturn }
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!llvm.module.flags = !{!0}
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!0 = !{i32 7, !"PIC Level", i32 2}
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