some shit

added
This commit is contained in:
opelly27
2023-04-22 12:52:39 -07:00
parent ea09b3b6d1
commit b2c9f4a78b
972 changed files with 4468 additions and 0 deletions
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This file has an mtime of when this was started.
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; ModuleID = 'probe0.4d391648-cgu.0'
source_filename = "probe0.4d391648-cgu.0"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64-apple-macosx11.0.0"
!llvm.module.flags = !{!0}
!0 = !{i32 7, !"PIC Level", i32 2}
@@ -0,0 +1,49 @@
; ModuleID = 'probe1.b457ac1c-cgu.0'
source_filename = "probe1.b457ac1c-cgu.0"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64-apple-macosx11.0.0"
; core::f64::<impl f64>::to_int_unchecked
; Function Attrs: inlinehint uwtable
define i32 @"_ZN4core3f6421_$LT$impl$u20$f64$GT$16to_int_unchecked17h185b9ba089790a2dE"(double %self) unnamed_addr #0 {
start:
; call <f64 as core::convert::num::FloatToInt<i32>>::to_int_unchecked
%0 = call i32 @"_ZN65_$LT$f64$u20$as$u20$core..convert..num..FloatToInt$LT$i32$GT$$GT$16to_int_unchecked17h9b7725447c9d0732E"(double %self)
br label %bb1
bb1: ; preds = %start
ret i32 %0
}
; <f64 as core::convert::num::FloatToInt<i32>>::to_int_unchecked
; Function Attrs: inlinehint uwtable
define internal i32 @"_ZN65_$LT$f64$u20$as$u20$core..convert..num..FloatToInt$LT$i32$GT$$GT$16to_int_unchecked17h9b7725447c9d0732E"(double %self) unnamed_addr #0 {
start:
%0 = alloca i32, align 4
%1 = fptosi double %self to i32
store i32 %1, i32* %0, align 4
%2 = load i32, i32* %0, align 4
br label %bb1
bb1: ; preds = %start
ret i32 %2
}
; probe1::probe
; Function Attrs: uwtable
define void @_ZN6probe15probe17he098e2c9f54edf27E() unnamed_addr #1 {
start:
; call core::f64::<impl f64>::to_int_unchecked
%_1 = call i32 @"_ZN4core3f6421_$LT$impl$u20$f64$GT$16to_int_unchecked17h185b9ba089790a2dE"(double 1.000000e+00)
br label %bb1
bb1: ; preds = %start
ret void
}
attributes #0 = { inlinehint uwtable "frame-pointer"="non-leaf" "target-cpu"="apple-a14" }
attributes #1 = { uwtable "frame-pointer"="non-leaf" "target-cpu"="apple-a14" }
!llvm.module.flags = !{!0}
!0 = !{i32 7, !"PIC Level", i32 2}
@@ -0,0 +1,27 @@
; ModuleID = 'probe2.f404e40a-cgu.0'
source_filename = "probe2.f404e40a-cgu.0"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64-apple-macosx11.0.0"
; probe2::probe
; Function Attrs: uwtable
define void @_ZN6probe25probe17h2289e20f4a9211a8E() unnamed_addr #0 {
start:
%0 = alloca i32, align 4
store i32 -2147483648, i32* %0, align 4
%1 = load i32, i32* %0, align 4
br label %bb1
bb1: ; preds = %start
ret void
}
; Function Attrs: nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.bitreverse.i32(i32) #1
attributes #0 = { uwtable "frame-pointer"="non-leaf" "target-cpu"="apple-a14" }
attributes #1 = { nofree nosync nounwind readnone speculatable willreturn }
!llvm.module.flags = !{!0}
!0 = !{i32 7, !"PIC Level", i32 2}
@@ -0,0 +1,27 @@
; ModuleID = 'probe3.cb64369a-cgu.0'
source_filename = "probe3.cb64369a-cgu.0"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64-apple-macosx11.0.0"
; probe3::probe
; Function Attrs: uwtable
define void @_ZN6probe35probe17h2b3c9b1031ab9009E() unnamed_addr #0 {
start:
%0 = alloca i32, align 4
store i32 1, i32* %0, align 4
%1 = load i32, i32* %0, align 4
br label %bb1
bb1: ; preds = %start
ret void
}
; Function Attrs: nofree nosync nounwind readnone speculatable willreturn
declare i32 @llvm.cttz.i32(i32, i1 immarg) #1
attributes #0 = { uwtable "frame-pointer"="non-leaf" "target-cpu"="apple-a14" }
attributes #1 = { nofree nosync nounwind readnone speculatable willreturn }
!llvm.module.flags = !{!0}
!0 = !{i32 7, !"PIC Level", i32 2}
@@ -0,0 +1,80 @@
; ModuleID = 'probe4.b24db3a5-cgu.0'
source_filename = "probe4.b24db3a5-cgu.0"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64-apple-macosx11.0.0"
%"core::panic::location::Location" = type { { [0 x i8]*, i64 }, i32, i32 }
@alloc5 = private unnamed_addr constant <{ [77 x i8] }> <{ [77 x i8] c"/rustc/4b91a6ea7258a947e59c6522cd5898e7c0a6a88f/library/core/src/ops/arith.rs" }>, align 1
@alloc6 = private unnamed_addr constant <{ i8*, [16 x i8] }> <{ i8* getelementptr inbounds (<{ [77 x i8] }>, <{ [77 x i8] }>* @alloc5, i32 0, i32 0, i32 0), [16 x i8] c"M\00\00\00\00\00\00\00\12\03\00\00\01\00\00\00" }>, align 8
@str.0 = internal constant [28 x i8] c"attempt to add with overflow"
@alloc3 = private unnamed_addr constant <{ [4 x i8] }> <{ [4 x i8] c"\02\00\00\00" }>, align 4
; <i32 as core::ops::arith::AddAssign>::add_assign
; Function Attrs: inlinehint uwtable
define internal void @"_ZN51_$LT$i32$u20$as$u20$core..ops..arith..AddAssign$GT$10add_assign17he5cd2e744e064107E"(i32* align 4 %self, i32 %other) unnamed_addr #0 {
start:
%0 = load i32, i32* %self, align 4
%1 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %0, i32 %other)
%_4.0 = extractvalue { i32, i1 } %1, 0
%_4.1 = extractvalue { i32, i1 } %1, 1
%2 = call i1 @llvm.expect.i1(i1 %_4.1, i1 false)
br i1 %2, label %panic, label %bb1
bb1: ; preds = %start
store i32 %_4.0, i32* %self, align 4
ret void
panic: ; preds = %start
; call core::panicking::panic
call void @_ZN4core9panicking5panic17h02e9fc642940f2ecE([0 x i8]* align 1 bitcast ([28 x i8]* @str.0 to [0 x i8]*), i64 28, %"core::panic::location::Location"* align 8 bitcast (<{ i8*, [16 x i8] }>* @alloc6 to %"core::panic::location::Location"*)) #5
unreachable
}
; <i32 as core::ops::arith::AddAssign<&i32>>::add_assign
; Function Attrs: inlinehint uwtable
define internal void @"_ZN66_$LT$i32$u20$as$u20$core..ops..arith..AddAssign$LT$$RF$i32$GT$$GT$10add_assign17haaf4dc4b2bf8999aE"(i32* align 4 %self, i32* align 4 %other) unnamed_addr #0 {
start:
%_5 = load i32, i32* %other, align 4
; call <i32 as core::ops::arith::AddAssign>::add_assign
call void @"_ZN51_$LT$i32$u20$as$u20$core..ops..arith..AddAssign$GT$10add_assign17he5cd2e744e064107E"(i32* align 4 %self, i32 %_5)
br label %bb1
bb1: ; preds = %start
ret void
}
; probe4::probe
; Function Attrs: uwtable
define void @_ZN6probe45probe17h17555576140a3688E() unnamed_addr #1 {
start:
%x = alloca i32, align 4
store i32 1, i32* %x, align 4
; call <i32 as core::ops::arith::AddAssign<&i32>>::add_assign
call void @"_ZN66_$LT$i32$u20$as$u20$core..ops..arith..AddAssign$LT$$RF$i32$GT$$GT$10add_assign17haaf4dc4b2bf8999aE"(i32* align 4 %x, i32* align 4 bitcast (<{ [4 x i8] }>* @alloc3 to i32*))
br label %bb1
bb1: ; preds = %start
ret void
}
; Function Attrs: nofree nosync nounwind readnone speculatable willreturn
declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) #2
; Function Attrs: nofree nosync nounwind readnone willreturn
declare i1 @llvm.expect.i1(i1, i1) #3
; core::panicking::panic
; Function Attrs: cold noinline noreturn uwtable
declare void @_ZN4core9panicking5panic17h02e9fc642940f2ecE([0 x i8]* align 1, i64, %"core::panic::location::Location"* align 8) unnamed_addr #4
attributes #0 = { inlinehint uwtable "frame-pointer"="non-leaf" "target-cpu"="apple-a14" }
attributes #1 = { uwtable "frame-pointer"="non-leaf" "target-cpu"="apple-a14" }
attributes #2 = { nofree nosync nounwind readnone speculatable willreturn }
attributes #3 = { nofree nosync nounwind readnone willreturn }
attributes #4 = { cold noinline noreturn uwtable "frame-pointer"="non-leaf" "target-cpu"="apple-a14" }
attributes #5 = { noreturn }
!llvm.module.flags = !{!0}
!0 = !{i32 7, !"PIC Level", i32 2}
@@ -0,0 +1,45 @@
; ModuleID = 'probe5.47297671-cgu.0'
source_filename = "probe5.47297671-cgu.0"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64-apple-macosx11.0.0"
%"core::panic::location::Location" = type { { [0 x i8]*, i64 }, i32, i32 }
@alloc3 = private unnamed_addr constant <{ [75 x i8] }> <{ [75 x i8] c"/rustc/4b91a6ea7258a947e59c6522cd5898e7c0a6a88f/library/core/src/num/mod.rs" }>, align 1
@alloc4 = private unnamed_addr constant <{ i8*, [16 x i8] }> <{ i8* getelementptr inbounds (<{ [75 x i8] }>, <{ [75 x i8] }>* @alloc3, i32 0, i32 0, i32 0), [16 x i8] c"K\00\00\00\00\00\00\00K\03\00\00\05\00\00\00" }>, align 8
@str.0 = internal constant [25 x i8] c"attempt to divide by zero"
; probe5::probe
; Function Attrs: uwtable
define void @_ZN6probe55probe17h56b49554577ddf77E() unnamed_addr #0 {
start:
%0 = call i1 @llvm.expect.i1(i1 false, i1 false)
br i1 %0, label %panic.i, label %"_ZN4core3num21_$LT$impl$u20$u32$GT$10div_euclid17hc2e166a3ed544004E.exit"
panic.i: ; preds = %start
; call core::panicking::panic
call void @_ZN4core9panicking5panic17h02e9fc642940f2ecE([0 x i8]* align 1 bitcast ([25 x i8]* @str.0 to [0 x i8]*), i64 25, %"core::panic::location::Location"* align 8 bitcast (<{ i8*, [16 x i8] }>* @alloc4 to %"core::panic::location::Location"*)) #3
unreachable
"_ZN4core3num21_$LT$impl$u20$u32$GT$10div_euclid17hc2e166a3ed544004E.exit": ; preds = %start
br label %bb1
bb1: ; preds = %"_ZN4core3num21_$LT$impl$u20$u32$GT$10div_euclid17hc2e166a3ed544004E.exit"
ret void
}
; Function Attrs: nofree nosync nounwind readnone willreturn
declare i1 @llvm.expect.i1(i1, i1) #1
; core::panicking::panic
; Function Attrs: cold noinline noreturn uwtable
declare void @_ZN4core9panicking5panic17h02e9fc642940f2ecE([0 x i8]* align 1, i64, %"core::panic::location::Location"* align 8) unnamed_addr #2
attributes #0 = { uwtable "frame-pointer"="non-leaf" "target-cpu"="apple-a14" }
attributes #1 = { nofree nosync nounwind readnone willreturn }
attributes #2 = { cold noinline noreturn uwtable "frame-pointer"="non-leaf" "target-cpu"="apple-a14" }
attributes #3 = { noreturn }
!llvm.module.flags = !{!0}
!0 = !{i32 7, !"PIC Level", i32 2}
@@ -0,0 +1,41 @@
; ModuleID = 'probe6.553e6923-cgu.0'
source_filename = "probe6.553e6923-cgu.0"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64-apple-macosx11.0.0"
; std::f64::<impl f64>::copysign
; Function Attrs: inlinehint uwtable
define internal double @"_ZN3std3f6421_$LT$impl$u20$f64$GT$8copysign17h03df885dab7e19beE"(double %self, double %sign) unnamed_addr #0 {
start:
%0 = alloca double, align 8
%1 = call double @llvm.copysign.f64(double %self, double %sign)
store double %1, double* %0, align 8
%2 = load double, double* %0, align 8
br label %bb1
bb1: ; preds = %start
ret double %2
}
; probe6::probe
; Function Attrs: uwtable
define void @_ZN6probe65probe17h02d85f581e587b28E() unnamed_addr #1 {
start:
; call std::f64::<impl f64>::copysign
%_1 = call double @"_ZN3std3f6421_$LT$impl$u20$f64$GT$8copysign17h03df885dab7e19beE"(double 1.000000e+00, double -1.000000e+00)
br label %bb1
bb1: ; preds = %start
ret void
}
; Function Attrs: nofree nosync nounwind readnone speculatable willreturn
declare double @llvm.copysign.f64(double, double) #2
attributes #0 = { inlinehint uwtable "frame-pointer"="non-leaf" "target-cpu"="apple-a14" }
attributes #1 = { uwtable "frame-pointer"="non-leaf" "target-cpu"="apple-a14" }
attributes #2 = { nofree nosync nounwind readnone speculatable willreturn }
!llvm.module.flags = !{!0}
!0 = !{i32 7, !"PIC Level", i32 2}
@@ -0,0 +1,8 @@
cargo:rustc-cfg=has_i128
cargo:rustc-cfg=has_to_int_unchecked
cargo:rustc-cfg=has_reverse_bits
cargo:rustc-cfg=has_leading_trailing_ones
cargo:rustc-cfg=has_int_assignop_ref
cargo:rustc-cfg=has_div_euclid
cargo:rustc-cfg=has_copysign
cargo:rerun-if-changed=build.rs
@@ -0,0 +1 @@
/Users/oliverpelly/Developer/rusty_brot/target/debug/build/num-traits-ccb86babd59d532c/out